Whitney Knitter May 27, 2023 State Machine Basics in Verilog vs VHDL Whitney Knitter May 27, 2023 See how to code the same simple finite state machine (FSM) in Verilog and VHDL.
Whitney Knitter May 27, 2023 How to Test Your Design with Vivado's Behavioral Simulation Whitney Knitter May 27, 2023 This tutorial walks through a simple demonstration of how to deploy your testbench using Vivado's behavioral simulation.
Whitney Knitter May 27, 2023 Add Custom IP Modules to Vivado Block Design Whitney Knitter May 27, 2023 See how to integrate custom RTL modules directly into Vivado block design flow.
Whitney Knitter May 27, 2023 Writing Embedded C Applications for the ZynqberryZero Whitney Knitter May 27, 2023 This project focuses on how to write embedded C applications for the ZynqberryZero using Vitis.
Whitney Knitter May 27, 2023 A Quick Look at the TinyFGPA & Lattice Diamond Whitney Knitter May 27, 2023 I’ve long since had an interest in the embedded world, particularly in FPGAs. So it’s been really exciting to see FPGAs making their way…
Whitney Knitter May 27, 2023 Design Flow for a Custom FPGA Board in Vivado and PetaLinux Whitney Knitter May 27, 2023 A little while back, a Raspberry Pi form factor FPGA board called the Zynqberry caught my eye and I spent some time with it to bring it up…
